Forventes på lager: 15-04-2008
This book provides a step-by-step interactive introduction to formal verification of systems and circuits. In view of the complexity of current parallel digital systems, a formal approach to their analysis and verification becomes essential. This text makes use of two powerful analysis tool sets: LOTOS-based CADP & Petri-Net based PETRIFY.
| Forlag | John Wiley & Sons Inc |
| Forfattere | Michael (Department of Computer Science Yoeli, Rakefet (Electrical Engineering Department Kol |
| Type | Bog |
| Format | Hardback |
| Sprog | Engelsk |
| Udgivelsesdato | 15-04-2008 |
| Første udgivelsesår | 2008 |
| Serie | Wiley Series on Parallel and Distributed Computing |
| Illustrationer | Drawings: 56 B&W, 0 Color |
| Originalsprog | United States |
| Sideantal | 248 |
| Indbinding | Hardback |
| Forlag | John Wiley & Sons Inc |
| Sideoplysninger | 248 pages, Drawings: 56 B&W, 0 Color |
| Mål | 243 x 163 x 22 |
| ISBN-13 / EAN-13 | 9780471704492 |