The book is devoted to design and optimization of control units represented by combined finite state machines (CFSMs). To optimize the circuits of CFSMs, we propose to use optimization methods targeting both Mealy and Moore FSMs.
This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs).
This book discusses control units represented by the model of a finite state machine (FSM). It contains various original methods and takes into account the peculiarities of field-programmable gate arrays (FPGA) chips and a FSM model.
This book is devoted to logic synthesis of field programmable gate array (FPGA)-based circuits of Mealy finite state machines (FSM). Three new methods of state assignment are proposed which allows obtaining FSM circuits required minimum amount of internal chip resources.