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In addition, subthreshold slope which is an indicator of how speedily the device drain current can be switched between near off current and maximum drain current is an important device attribute to model at lower operating substrate temperatures.
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In order to sustain Moore's Law-based device scaling, principal attention has focused on toward device architectural innovations for improved device performance as per ITRS projections for technology nodes up to 10 nm. Efficient integration of lower substrate temperatures (
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Parameters that determine the performance of silicon-based Field Effect Transistors (FET) devices in the presence of degenerate doping, often are not modeled properly and so require precise analysis to improve modeling accuracy.